School of Computer EngineeringcorelabSem 4
DIGITAL SYSTEMS LAB
CSS 2112
Syllabus
- 01Simulation of Logic Circuits Using Verilog: Simplification of Expressions using Kmap: SOP and POS Forms
- 02Multilevel NAND, NOR Circuits
- 03Arithmetic Circuits: Half Adder, Full Adder, Multi-Bit Adder/Subtractor
- 04BCD Adder
- 05Multiplexers
- 06Decoders and Encoders
- 07Latches and Flip-Flops: D, JK, and T Flip-Flops
- 08Registers: Shift Register
- 09Design of sequential circuits
References
- Stephen Brown and Zvonko Vranesic, Fundamentals of Digital Logic with Verilog Design, (3e), Tata McGraw Hill, 2014
- Morris Mano M., Digital Design, (5e), PHI Learning 2007
Credits Structure
0Lecture
0Tutorial
3Practical
1Total